# HG changeset patch
# User William Astle <lost@l-w.ca>
# Date 1556157188 21600
# Node ID bf24b8c856d14038c10159bdd09e12cd5a56a7d2
# Parent  469a130e7029844d8d70ce19b612a802a10e6f55
Update "clrq" convenience instruction to be slightly faster

From Doug Masten <doug@dougmasten.com> who says:

This is not a bug fix but a very tiny optimization for the "clrq"
convenience instruction in LWTOOLS. This patch changes it from "clra; clrb;
tfr d,w" to "clrd; clrw". The new instructions now take 2 clock cycles less
for a total of 4 clock cycles.

diff -r 469a130e7029 -r bf24b8c856d1 lwasm/instab.c
--- a/lwasm/instab.c	Tue Mar 19 14:45:53 2019 -0600
+++ b/lwasm/instab.c	Wed Apr 24 19:53:08 2019 -0600
@@ -358,7 +358,7 @@
 
 	// 6309 convenience instructions
 	{ "asrq",		{	0x1047,	0x1056,	-1,		 4	},	insn_parse_conv,		insn_resolve_conv,				insn_emit_conv,				lwasm_insn_is6309conv },
-	{ "clrq",		{	0x4f5f,	0x1F06,	-1,		 6	},	insn_parse_conv,		insn_resolve_conv,				insn_emit_conv,				lwasm_insn_is6309conv },
+	{ "clrq",		{	0x104f,	0x105f,	-1,		 4 	},	insn_parse_conv,		insn_resolve_conv,				insn_emit_conv,				lwasm_insn_is6309conv },
 	{ "comq",		{	0x1043,	0x1053,	-1,		 4	},	insn_parse_conv,		insn_resolve_conv,				insn_emit_conv,				lwasm_insn_is6309conv },
 	{ "lsle",		{	0x1030,	0xee,	-1,		 4	},	insn_parse_conv,		insn_resolve_conv,				insn_emit_conv,				lwasm_insn_is6309conv },
 	{ "lslf",		{	0x1030,	0xff,	-1,		 4	},	insn_parse_conv,		insn_resolve_conv,				insn_emit_conv,				lwasm_insn_is6309conv },